c – Why when compiling with Makefile files needed by executables must be in the Makefile directory?

I’m using a Makefile to generate two executables: client and server.
The directories structure is the following:

  1. Makefile
  2. src (.c and .h file)
  3. exec (where binaries will be)

Makefile works fine but the server can’t read the files it needs if they are not in the Makefile directory (I would like to place them in exec folder). Same thing happens to the client that can’t write.

The Makefile is the following:

OBJS = ./src/common.o ./src/core.o ./src/misc.o ./src/policy_lang.o
CC = gcc
SRC = src
EXEC = exec
CFLAGS  = -O3 -Wall -Wextra
    -I/usr/include/glib-2.0 -I/usr/lib/x86_64-linux-gnu/glib-2.0/include 
    -I/usr/include/pbc -I/usr/local/include/pbc 
LDFLAGS = -O3 -Wall -Wextra 
    -Wl,-rpath /usr/local/lib -lgmp 
    -Wl,-rpath /usr/local/lib -lpbc 
    -lcrypto -lcrypto  
    -lnsl -lsocket

TARGETS = $(EXEC)/client $(EXEC)/server

$(SRC)/%.o: $(SRC)/%.c $(SRC)/*.h
    $(CC) -c -o $@ $< $(CFLAGS)
$(EXEC)/client: $(OBJS) $(SRC)/client.o
    $(CC) -o $@ $^ $(LDFLAGS) 
$(EXEC)/server: $(OBJS) $(SRC)/server.o
    $(CC) -o $@ $^ $(LDFLAGS) -pthread
all: $(TARGETS)

    rm -f $(OBJS) $(TARGETS)